Document Type
Conference Proceeding
Publisher
Society of Photo-Optical Instrumentation Engineers
Faculty
Faculty of Computing, Health and Science
School
Electron Science Research Institute (ESRI)
RAS ID
5366
Abstract
This paper presents a short-distance reconfigurable high-speed optical interconnects architecture employing a Vertical Cavity Surface Emitting Laser (VCSEL) array, Opto-very-large-scale-integrated (Opto-VLSI) processors, and a photodetector (PD) array. The core component of the architecture is the Opto-VLSI processor which can be driven by digital phase steering and multicasting holograms that reconfigure the optical interconnects between the input and output ports. The optical interconnects architecture is experimentally demonstrated at 2.5 Gbps using high-speed 1×3 VCSEL array and 1×3 photoreceiver array in conjunction with two 1×4096 pixel Opto-VLSI processors. The minimisation of the crosstalk between the output ports is achieved by appropriately aligning the VCSEL and PD elements with respect to the Opto-VLSI processors and driving the latter with optimal steering phase holograms.
DOI
10.1117/12.696359
Access Rights
free_to_read
Comments
This is an Author's Accepted Manuscript of: Aljada, M. , Alameh, K. , Lee, Y. T., & Chung, I. (2007). Opto-VLSI-Based reconfigurable free space optical interconnects architecture. Proceedings of SPIE conference in Smart Structures, Devices, and systems. Adelaide, Australia. SPIE. Available here
Copyright 2007 Society of Photo-Optical Instrumentation Engineers (SPIE). One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper are prohibited.