Document Type

Conference Proceeding

Publisher

IEEE

Faculty

Computing, Health and Science

School

Engineering and Mathematics

RAS ID

945

Comments

This conference paper was originally published as: Lachowicz, S. W., Rassau, A. M., Alagoda, G. N., Eshraghian, K. , Lee, M., & Lee, S. (2002). Image capture using integrated 3D SoftChip technology. Proceedings of 5th IEEE International Conference on High Speed Networks and Multimedia Communications. (pp. 19-23). Korea. IEEE. Original article available here

© 2002 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

Abstract

Mobile multimedia communication has rapidly become a significant area of research and development. The processing requirements for the capture, conversion, compression, decompression, enhancement, display, etc. of high quality multimedia content places heavy demands even on current ULSI (ultra large scale integration) systems, particularly for mobile applications where area and power are primary considerations. The system presented is designed as a vertically integrated (3D) system comprising two distinct layers bonded together using indium bump technology. The top layer is a CMOS imaging array containing analog-to-digital converters, and a buffer memory. The bottom layer takes the form of a configurable array processor (CAP), a highly parallel array of soft programmable processors capable of carrying out complex processing tasks directly on data stored in the top plane. Until recently, the dominant format of data in imaging devices has been analog. The analog photocurrent or sampled voltage is transferred to the ADC via a column or a column/row bus. In the proposed system, an array of analog-to-digital converters is distributed, so that a one-bit cell is associated with one sensor. The analog-to-digital converters are algorithmic current-mode converters. Eight such cells are cascaded to form an 8-bit converter. Additionally, each photosensor is equipped with a current memory cell, and multiple conversions are performed with scaled values of the photocurrent for colour processing.

DOI

10.1109/HSNMC.2002.1032389

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Link to publisher version (DOI)

10.1109/HSNMC.2002.1032389