A Low Cost Atheros System-on-Chip and OpenWrt Based Testbed for 802.11 WLAN Research
Faculty of Computing, Health and Science
School of Engineering / Centre for Communications Engineering Research
The IEEE 802.11 Wireless Local Area Network (WLAN) is a popular internet access technology, and researchers are continuously working on the quality of service (QoS) improvement by proposing new and efficient schemes. Performance analysis and benchmarking are an integral part of WLAN research. In most of the cases, this is done through computer simulation using popular network simulators such as Network Simulator - 2 (NS-2) or OPNET. The computer simulation of a dynamic system such as a communication network heavily depends upon a set of stochastic models for capturing the real-time behaviors of the system. The choice of a set of stochastic models that represent the most practical scenario is often debated and there is no universal consensus on the choice of these models. This is why, for proper assessment of the merits of a proposal, and any associated commercialization activities, a validation on a hardware platform is highly recommended. Researchers have developed few Field Programmable Gate Array (FPGA) and System-on-Chip (SoC) based hardware, but most of these development platforms are expensive and/or have limited support for networking layers software. This letter proposes an Atheros SoC based hardware platform, and an open-source Linux software stack, called OpenWrt, for WLAN research. The proposed hardware is available off-the-shelf as a WLAN access point (AP), and is a cost-effective way of generating results on a hardware system. A new MAC protocol is implemented on one such WLAN access point to prove the platform.
Not open access