Document Type

Conference Proceeding




Faculty of Health, Engineering and Science


School of Engineering/National Networked Tele-Test Facility for Integrated Systems




This article was originally published as: Chan, K., Nordin, N., Chan, K., Lok, T., Yong, C., & Osseiran, A. (2013). Oscillation built-in-self-test for ADC linearity testing in deep submicron CMOS technology. Proceedings of the 5th Asia Symposium on Quality Electronic Design. (pp. 208-215). Penang, Malaysia. IEEE. © 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Original article available here


This paper proposes an Oscillation BIST (OBIST) that is meant to test ADCs fabricated in sub 100nm processes. The design is intended to be capable of testing a 10-bit ADC that was designed in 40nm CMOS. The design scheme presents a simple analog stimulus generator that was designed in 40nm CMOS together with schematic based simulation results. There is also a description of a calibration circuit and a highlevel implementation of a BIST control system to run the BIST and to calculate static parameters such as Differential Non-linearity (DNL) and Integral Non-linearity (INL). Simulation results for the analog stimulus generator suggest that OBIST might still be a viable method to test ADCs despite device scaling to sub 100nm processes.