Ultra High Bandwidth Image and Data Processing using 3-D Vertically Integrated Architectures
Faculty of Computing, Health and Science
School of Engineering and Mathematics
The emergence of Truly Deep Submicron Technology (TDST) and related 3-D interconnection technologies has created a shift in potential solutions from conventional architectures to 3-D systems through integration of TDST, Vertical Software Mapping and Intelligent Interconnect Technology (IIT). The concept of 3-D Soft-Chip Technology (SCT) entails integration of "Soft-Processing Circuits" with "Soft-Configurable Circuits", which effectively manipulates hardware primitives through vertical integration of control and data. Thus the notion of 3-D Soft-Chip emerges as a new design paradigm for content-rich multimedia, telecommunication and photonic-based networking system applications. Combined with the effective manipulation of configurable hardware arithmetic primitives, highly efficient and powerful soft configurable processing systems can be realized. This paper provides an insight into realisation of a novel 3 –D configurable architecture based on "sea-of-pixels" architecture, which is highly suitable for applications in multimedia systems as well as for computation of coefficients for generation of holograms required in optical switches. The paper explores strategies for implementation of distributed primitives for arithmetic processing. This entails optimisation of basic cells that would allow using these primitives as part of a 3-D "sea-of-pixel" configurable processing array.